IDT 2006 - Call for Papers

CALL FOR PAPERS

Overview -- Author Information -- Committees

Overview

This event provides a unique forum to discuss novel approaches in design, automation and test in the Middle East and Africa (MEA) region for researchers and practitioners in the areas of VLSI design, test and fault tolerance to come together to discuss new research ideas and present new research results. This event will provide the only VLSI Design &Test-specific meeting in the MEA region. The event will run in conjunction with the annual Innovations of IT Conference and in parallel with GITEX, the world’s third largest IT exhibit, with over 100,000+ visitors in 2005. Topics include, but are not limited to, the following:

Design Methods and Tools:
- Nanotechnology architectures
- MEMs
- Quantum computing
- Mixed-signal and RF design
- Circuit simulation and timing analysis
- IC physical design automation
- Power analysis and low power design
- Design verification
- Logic synthesis
- SOC/NOC/MPSOC design issues
- Packaging
- Design for manufacturability (DFM)
Test Methods and Automation:
- DFT
- Synthesis for testability
- Test generation
- Test simulation
- iDDQ testing
- Defect-based test
- Fault modeling
- Test issues in nanotechnology
- Built-In Self Test (BIST)
- Design for verification
- Memory and FPGA test and repair
- SOC/NOC/MPSOC test
- Automatic test equipment
- Analog and mixed-signal test
- On-line testing
- Test resource partitioning
- Failure analysis
- Fault tolerance
- Process monitoring and control
- Economics of test

Author Information

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To present at the Workshop, authors are invited to submit a full paper or extended summary of at least three pages of recent research or best current practices. Each submission should include: title, full name and affiliation of all authors, an abstract of 50 words, and keywords. It should also identify a contact author and include a complete correspondence address, phone number, fax number, and E-mail address. All submissions must be made electronically in PDF or Postscript format via E-mail. Proposals for panels and embedded tutorials are also invited.

Please ensure that your PFD or Postscript file is readable by Acrobat Reader or Ghostview. The submission of a paper or panel proposal will be considered evidence that upon acceptance, the author(s) will present the paper or organize the panel at the workshop.

Submission Deadline: September 22nd, 2006
Notification of Acceptance: October 20th, 2006
Final Version: November 10th, 2006

Submit your paper proposal electronically to: submissions@tttc-idt.org

Authors of accepted papers are requested to submit the complete manuscript of the paper, providing the name and contact information of the presenting person, for inclusion in the Digest of Papers, which will be provided to the attendees.

For general information:

GENERAL CO-CHAIRS

Rafic Makki
UAE University
P.O. Box # 17555, Al-Ain
United Arab Emirates
T: +971-3-762-6209
F: +971-3-762-6309
E: makki@uaeu.ac.ae

Yervant Zorian
Virage Logic, Inc. -USA
47100 Bayside Parkway
Fremont CA, 94538, USA
T: +1-510-360-8035
F: +1-510-360-8099
E: zorian@viragelogic.com

Committees

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General Co-Chairs
Rafic Makki - UAE University
Yervant Zorian - Virage Logic

Vice-General Chair
Adam Osseiran - Edith Cowan University

Program Co-Chairs
Andre Ivanov - U. of British Columbia
Sultan Al-Harbi - Kuwait University

Publicity Chair
Bernard Courtois - TIMA

Local Arrangements Chair
Hamad AL Hammadi - Etisalat U. College

Finance Chair
Valeriu Beiu - UAE University

Publications Chair
Muhamed Azimane - Philips

Asian Liaison
Quiang Xu - The Chinese U. of Hong Kong

European Liaison
Ahmed Jerraya - TIMA

North American Liaison
Alex Orailoglu - UCSD

TTTC Liaison
Ibrahim Hajj - American University of Beirut

Program Committee:
M. Abadir - Freescale
J. Abraham - University of Texas at Austin
S. Adham - LogicVision
Z. Al-Ars - Delft University
M. Al-Failakawi - Kuwait University
B. Al-Hashimi - University of Southampton
A. Al-Yamani - KFUPM
L. Ammar - Atmel France
K. Arabi - PMC Sierra
E. Bastaki - Dubai Silicon Oasis
M. Bayoumi - U. of Louisiana at Lafayette
L. Bouzaida - ST Microelectronics
A. Chehab - American University of Beirut
G. De Micheli - EPFL
A. El-Maleh - KFUPM
M. Hafed - DFT Microsystems
S. Hamdioui - Delft University
J. Hayes - University of Michigan
A. Kayssi - American University of Beirut
F. Kurdahi - U. of California at Irvine
M. Nourani - University of Texas at Dallas
M. Pedram - U. of Southern California
K. Roy - Purdue University
M. Slamani - IBM
M. Tehranipoor - University of Maryland
H. Wunderlich - Stuttgart University

For more information, visit us on the web at: http://www.tttc-idt.org

The First IEEE International Design and Test Workshop (IDT'06) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).